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Simulation of Improving the Breakdown Voltage of Superjunction VDMOS Devices (Including Termination) Using Nuwa TCAD Software

GMPT, October 2024

Abstract: Superjunction Vertical Double-Diffused Metal Oxide Semiconductor (Superjunction VDMOS) field-effect transistors, as a type of power device, combine the fast switching speed and high static input impedance of a standard MOS with the high current-carrying capacity of a bipolar transistor. This has led to their widespread use in applications such as motor speed control, radar, motor drivers, inverters, uninterruptible power supplies, switching power supplies, high-fidelity audio, automotive electronics, mobile communications, energy-saving lamps, and electronic ballasts. However, due to the electric field concentration effect at the device's edge, it cannot fully exploit the high critical breakdown electric field of the material. To address this, a suitable terminal structure design is needed to improve the reverse breakdown voltage of the device.

1. Superjunction VDMOS Devices


Figure 1. Schematic structure of the Superjunction VDMOS device

The Superjunction VDMOS device is shown in Figure 1, with I-V characteristics similar to a standard MOS.


Figure 2. I-V Characteristics of the Superjunction VDMOS Device

As shown in Figure 2, when the gate voltage is either not applied or below the device threshold voltage VthV_{th}, an electron channel does not form, the PN pillars deplete each other, and maintain the applied reverse voltage, resulting in a very small drain current IDSI_{DS}. In this state, the device operates in the cut-off region. If the gate voltage exceeds the threshold voltage, i.e., VGS>VthV_{GS}>V_{th}, an inversion layer forms in the Pbase region, opening the electron channel. A conduction path is formed from the source region through the Pbase and N regions to the drain region, and the device starts to output forward current. If the drain voltage VDSV_{DS} is very small, the depletion region at the Pbase-pillar junction is narrow, and the device's on-resistance can be considered almost constant, indicating linear region operation. With increasing VDSV_{DS} approaching VGSVthV_{GS}-V_{th}, the electron channel in the Pbase narrows, increasing on-resistance and shifting the device to the non-linear region. When VDSV_{DS} reaches VDS>(VGSVth)V_{DS}>(V_{GS}-V_{th}), the electron channel is pinched off, and IDSI_{DS} ceases to increase with further VDSV_{DS} increase, indicating operation in the saturation region. If both the drain and gate voltages are high, IDSI_{DS} increases with VDSV_{DS}, while the effect of VGSV_{GS} nearly saturates, entering the quasi-saturation region. If VDSV_{DS} continues to increase such that the internal electric field exceeds the material's critical breakdown electric field, avalanche breakdown occurs, and IDSI_{DS} rapidly rises, indicating breakdown region operation.


Figure 3. (a) Electric field profile of conventional VDMOS device (b) Electric field profile of Superjunction VDMOS device

Figure 3 shows the electric field profiles of conventional VDMOS and Superjunction VDMOS devices. The Superjunction VDMOS introduces a superjunction structure to replace the lightly doped drift region of conventional structures, creating a lateral breakdown-resisting layer. The field lines originating from the positive charges encounter alternating positive and negative charges, effectively canceling each other out, allowing the electric field lines to traverse the superjunction area without significant variation in intensity. Consequently, the electric field profile area increases significantly, thus enhancing the breakdown voltage of the device.

2. Superjunction Termination

Common termination technologies include field rings, field plates, junction termination extension, lateral doping variation, and RESURF technology. This paper studies the charge-balanced and charge-imbalanced superjunction termination structures shown in the figure below.


Figure 4. (a) Charge-balanced termination structure (b) Charge-imbalanced termination structure

The charge-balance condition is Qn=QpQ_n = Q_p

Applied to the P and N pillars in the terminal structure, it can be written as

NAWp=NDWnN_AW_p = N_DW_n

The charge-balanced termination in Figure 4 satisfies this condition, while the charge-imbalanced termination reduces the N pillar width from WnW_n to WnW_n^*, breaking the charge balance and resulting in NAWp>NDWnN_AW_p > N_DW_n^*. Consequently, the N pillar is fully depleted while the P pillar retains some remaining charge.

Charge-Balanced Termination

First, we calculate the breakdown voltage of the charge-balanced termination.


Figure 5. Charge-balanced termination structure and its electric field profile

At this time, the device is charge-balanced, and the PN junction is fully depleted with maximum electric field strength at the surface of the PN junction: Emax=qNAWpϵ=qNDWnϵ\begin{align} E_{max} = \frac{qN_A W_p}{\epsilon} = \frac{qN_DW_n}{\epsilon} \end{align}

The breakdown voltage of the device corresponds to the area under the electric field strength curve: BVbalance=12WdEmax=12WdqNAWpϵ=12WdqNDWnϵ\begin{align} BV_{balance} = \frac12 W_d E_{max} = \frac12 W_d\frac{qN_A W_p}{\epsilon} = \frac12 W_d\frac{qN_DW_n}{\epsilon} \end{align}

Charge-Imbalanced Termination

Based on references [2][3], the breakdown voltage of the charge-imbalanced termination is calculated in two parts. The first part calculates the breakdown voltage of each PN junction depletion region in the terminal area, while the second part models the entire terminal region as an equivalent P-type semiconductor to calculate its breakdown voltage (as the P pillar charge is not fully depleted). The total breakdown voltage is the sum of these two parts.

First, calculating the first part:


Figure 6. Charge-imbalanced termination structure (first part) and its electric field profile

At this stage, the N pillar charge is depleted, and breakdown voltage can be calculated using the N pillar parameters: BV1=12WdEmax1=12WdqNDWnϵ\begin{align} BV_1 = \frac12 W_d E_{max1} = \frac12 W_d\frac{qN_DW_n^*}{\epsilon} \end{align}

Next, calculating the second part:


Figure 7. Charge-imbalanced termination structure (second part) and its electric field profile

Since the P pillar charge is not fully depleted, the terminal area can be modeled as an equivalent P-type semiconductor. The residual charge of a single PN junction in the charge-imbalanced termination is NAWpNDWnN_A W_p-N_DW_n^*and the total number of PN junctions in the terminal area is WdWp+Wn\frac{W_d}{W_p+W_n^*}Thus, the total residual charge in the terminal area is Q=(NAWpNDWn)WdWp+WnQ=(N_A W_p-N_DW_n^*)\frac{W_d}{W_p+W_n^*}The maximum electric field at this stage is Emax2=qQϵ=q(NAWpNDWn)Wdϵ(Wp+Wn)E_{max2} = \frac{qQ}{\epsilon} = \frac{q(N_A W_p-N_DW_n^*)W_d}{\epsilon(W_p+W_n^*)}The width of the breakdown region also changes as follows: δWd=WdWd=QND=NAWpNDWnNDWdWp+Wn\delta W_d = W_d^* - W_d = \frac{Q}{N_D} = \frac{N_A W_p-N_DW_n^*}{N_D}\frac{W_d}{W_p+W_n^*}Thus, the breakdown voltage of the terminal area is BV2=12WdEmax2=12q(NAWpNDWn)Wdϵ(Wp+Wn)(Wd+NAWpNDWnNDWdWp+Wn)BV_2 = \frac12 W_d^* E_{max2} = \frac12 \frac{q(N_A W_p-N_DW_n^*)W_d}{\epsilon(W_p+W_n^*)}(W_d + \frac{N_A W_p-N_DW_n^*}{N_D}\frac{W_d}{W_p+W_n^*})

The total breakdown voltage of the terminal area is the sum of the two parts: BVimbalance=BV1+BV2=12WdqNDWnϵ+12q(NAWpNDWn)Wdϵ(Wp+Wn)(Wd+NAWpNDWnNDWdWp+Wn)BV_{imbalance} = BV_1 + BV_2 = \frac12 W_d\frac{qN_DW_n^*}{\epsilon} + \frac12 \frac{q(N_A W_p-N_DW_n^*)W_d}{\epsilon(W_p+W_n^*)}(W_d + \frac{N_A W_p-N_DW_n^*}{N_D}\frac{W_d}{W_p+W_n^*})This can be simplified to BVimbalance=12WdqNAWpϵ+12Wdq(NAWpNDWn)ϵ(WdWp+Wn1+Wd(NAWpNDWn)ND(Wp+Wn)2)BV_{imbalance} = \frac12 W_d\frac{qN_A W_p}{\epsilon} + \frac12 W_d \frac{q(N_A W_p-N_DW_n^*)}{\epsilon}(\frac{W_d}{W_p+W_n^*}-1+\frac{W_d(N_A W_p-N_DW_n^*)}{N_D(W_p+W_n^*)^2})The first term represents the breakdown voltage of the charge-balanced termination, BVbalanceBV_{balance}, and since WdWp+Wn>>1\frac{W_d}{W_p+W_n^*}>>1 and NAWp>NDWnN_AW_p > N_DW_n^*, the second term is greater than 0, leading to the conclusion: BVimbalance>BVbalanceBV_{imbalance} > BV_{balance}Thus, the breakdown voltage of the charge-imbalanced termination is higher than that of the charge-balanced termination.

3. Simulation Settings and Results

Physical Model Setup

3.1 Continuity Equation

JnjRntjRspRstRau+Gopt(t)=nt+NDfDt\nabla \cdot J_n-\sum_j R_n^{t j}-R_{s p}-R_{s t}-R_{a u}+G_{o p t}(t)=\frac{\partial n}{\partial t}+N_D \frac{\partial f_D}{\partial t} Jp+jRptj+Rsp+Rst+RauGopt(t)=pt+NAfAt\nabla \cdot J_p+\sum_j R_p^{t j}+R_{s p}+R_{s t}+R_{a u}-G_{o p t}(t)=-\frac{\partial p}{\partial t}+N_A \frac{\partial f_A}{\partial t}

3.2 Poisson’s Equation

(ϵ0ϵdcqV)=n+p+ND(1fD)NAfA+jNtj(δjftj)-\nabla \cdot\left(\frac{\epsilon_0 \epsilon_{d c}}{q} \nabla V\right)=-n+p+N_D\left(1-f_D\right)-N_A f_A+\sum_j N_{t j}\left(\delta_j-f_{t j}\right)

3.3 Low-Field and High-Field Mobility Models

  • Low-field mobility model (Masetti Model)

    μ0=μmin1ePcNi+μmax(TLT0)ζμmin21+(NiCr)αμ11+(CsNi)β\mu_{0}=\mu_{\min 1} e^{-\frac{P_{c}}{N_{i}}}+\frac{\mu_{\max }\left(\frac{T_L}{T_{0}}\right)^{-\zeta}-\mu_{\min 2}}{1+\left(\frac{N_{i}}{C_{r}}\right)^{\alpha}}-\frac{\mu_{1}}{1+\left(\frac{C_{s}}{N_{i}}\right)^{\beta}}
  • High-field mobility model (Canali Model)

    μn=μ0n(1+(μ0nF/vsn)βn)1/βn\mu_n =\frac{\mu_{0 n}}{\left(1+\left(\mu_{0 n} F / v_{s n}\right)^{\beta_n}\right)^{1 / \beta_n}} μp=μ0p(1+(μ0pF/vsp)βp)1/βp\mu_p =\frac{\mu_{0 p}}{\left(1+\left(\mu_{0 p} F / v_{s p}\right)^{\beta_p}\right)^{1 / \beta_p}}

3.4 Bulk Defect Model

  • Shockley-Read-Hall ModelRntj=cnjnNtj(1ftj)cnjn1jNtjftjR_n^{t j}=c_{n j} n N_{t j}\left(1-f_{t j}\right)-c_{n j} n_{1 j} N_{t j} f_{t j} Rptj=cpjpNtjftjcpjp1jNtj(1ftj)R_p^{t j}=c_{p j} p N_{t j} f_{t j}-c_{p j} p_{1 j} N_{t j}\left(1-f_{t j}\right) Ntjftjt=RntjRptjN_{t j} \frac{\partial f_{t j}}{\partial t}=R_n^{t j}-R_p^{t j}
cnj=σnjvn=σnj8kTπmnc_{n j}=\sigma_{n j} v_n=\sigma_{n j} \sqrt{\frac{8 k T}{\pi m_n}} cpj=σpjvp=σpj8kTπmpc_{p j}=\sigma_{p j} v_p=\sigma_{p j} \sqrt{\frac{8 k T}{\pi m_p}} 1τnj=cnjNtj;1τnj=cnjNtj\frac{1}{\tau_{n j}}=c_{n j} N_{t j}; \quad \frac{1}{\tau_{n j}}=c_{n j} N_{t j}

3.5 Impact Ionization Model

  • Okuto Model α(Fava )=a(1+c(TT0))Fava γexp[(b[1+d(TT0)]Fava )δ]\alpha\left(F_{\text {ava }}\right)=a \cdot\left(1+c\left(T-T_{0}\right)\right) F_{\text {ava }}^{\gamma} \exp \left[-\left(\frac{b\left[1+d\left(T-T_{0}\right)\right]}{F_{\text {ava }}}\right)^{\delta}\right]

Simulation Parameter Settings

In this study, the P pillar width is set to Wp=5μW_p=5\mum, P pillar doping concentration to NA=3×1015cm3N_A=3\times 10^{15} {cm}^{-3}, N pillar width to Wn=12μW_n=12\mum and Wn=10μW_n^*=10\mum, N pillar doping concentration to ND=9×1014cm3N_D=9\times 10^{14} {cm}^{-3}, Pbase doping concentration to 1×1017cm31\times 10^{17} {cm}^{-3}, drain doping concentration to 1×1020cm31\times 10^{20} {cm}^{-3}, and source doping concentration to 5×1016cm35\times 10^{16} {cm}^{-3}.

Simulation Results


Figure 8. Breakdown curves of the two terminal structures

As shown in Figure 8, the leakage current before breakdown is nearly identical for both terminal structures, approximately 5×106A/m5\times 10^{-6}A/m. The charge-balanced termination breaks down at around 500V, whereas the charge-imbalanced termination breaks down at around 600V. The breakdown voltage of the terminal is improved by approximately 100V, confirming that the breakdown voltage of the charge-imbalanced termination is greater than that of the charge-balanced termination.

4. Conclusion

This paper first introduced the basic principles of Superjunction VDMOS devices and then examined the charge-balanced and charge-imbalanced termination structures. The theoretical derivation concluded that the breakdown voltage of the charge-imbalanced termination is higher than that of the charge-balanced termination. Finally, Nuwa TCAD software was used to simulate the breakdown voltage of the two termination structures, validating the correctness of the conclusion.

References

[1] Q. Qian, W. Sun, J. Zhu and S. Liu, A Novel Charge-Imbalance Termination for Trench Superjunction VDMOS, IEEE Electron Device Lett., vol. 31, no. 12, Dec. 2010.

[2] H. Wang, E. Napoli, and F. Udrea, Breakdown voltage for superjunction power devices with charge imbalance: An analytical model valid for both punch through and non punch through devices, IEEE Trans Electron Devices, vol. 56, no. 12, Dec. 2009.

[3] E. Napoli, H. Wang, and F. Udrea, The effect of charge imbalance on superjunction power devices: An exact analytical solution, IEEE Electron Device Lett., vol. 29, no. 3, Mar. 2008.